A. Field of the Invention
The present invention relates to power semiconductor devices and the method for manufacturing the power semiconductor devices. Specifically, the invention relates to bidirectional devices that exhibit bidirectional withstand voltage characteristics or reverse blocking devices that exhibit bidirectional withstand voltage characteristics.
B. Description of the Related Art
The insulated gate bipolar transistor (hereinafter referred to as the “IGBT”), that is one of the power semiconductor devices, is a one-chip power device that exhibits the high-speed switching performances and the voltage-driven performances, which the metal-oxide-semiconductor field-effect transistor (hereinafter referred to as the “MOSFET”) exhibits. The IGBT also exhibits the low ON-state voltage characteristics which the bipolar transistor exhibits. The IGBT is applied to industrial equipment such as general purpose inverters, AC servos, uninterruptible power sources (hereinafter referred to as “UPS”), and switching power supplies. The IGBT is expanding its application fields to the livelihood instruments such as microwave ovens, electric rice cookers, and stroboscopes.
To convert an alternating current to another alternating current, that is to facilitate an AC/AC conversion, the use of a bidirectional switching device for a matrix converter and such a converter circuit of a direct link type has been investigated to reduce the size, weight, and costs of the circuit, to obtain a high conversion efficiency, and to realize a high-speed response. In order to obtain the bidirectional switching device described above by connecting IGBTs in opposite parallel, an IGBT that exhibits a certain reverse blocking voltage (hereinafter referred to as a “reverse blocking IGBT”) has been desired.
In the following descriptions, electrons or holes are majority carriers in the semiconductor prefixed with “n-type” or “p-type”. The symbol “+” or “−” on the shoulder of the letter “n” or “p” indicating the conductivity type of the semiconductor indicates that the semiconductor is doped relatively heavily or relatively lightly.
FIG. 24 is a cross sectional view which shows the structure of a conventional reverse blocking IGBT. As shown in FIG. 24, reverse blocking IGBT 270 of an n-channel type includes active section 100, edge termination section 110 having a voltage blocking structure (hereinafter referred to simply as “edge termination section 110”), and separation section 127 having a device separation structure (hereinafter referred to simply as “separation section 127”). Edge termination section 110 is disposed around active section 100 and separation section 127 around edge termination section 110.
In active section 100, p-type base region 2 is formed selectively in the surface portion on the first major surface side of semiconductor substrate 1 that works for an n−-type drift layer. In the surface portion of p-type base region 2, n+-type emitter region 3 is formed selectively. On the first major surface side, gate electrode 5 is disposed above the extended portion of p-type base region 2 extended between n+-type emitter region 3 and semiconductor substrate 1 and above the extended portion of semiconductor substrate 1 extended between p-type base regions 2 with gate insulator film 4 interposed between the extended portions and the gate electrode 5. On the first major surface side, emitter electrode 7 is connected to the extended portion of p-type base region 2 extended between n+-type emitter regions 3. Gate electrode 5 and emitter electrode 7 are isolated from each other by insulator film 6. Passivation film 8 is disposed on emitter electrode 7.
In edge termination section 110, p-type semiconductor region (hereinafter referred to as “p-type guard ring”) 11 is formed selectively in the surface portion on the first major surface side of semiconductor substrate 1. Metal film (hereinafter referred to as “guard ring electrode”) 13 is connected to p-type guard ring 11. The provision of p-type guard ring 11 and guard ring electrode 13 facilitates sustaining the withstand voltage in the forward direction.
On the second major surface on the back surface side of semiconductor substrate 1, p-type collector layer 9 is extended from active section 100 to separation section 127. Collector electrode 10 is disposed on p-type collector layer 9. In separation section 127, p-type separation region 91 is extended from the first major surface side of semiconductor substrate 1 to p-type collector layer 9 on the second major surface side.
The conventional IGBTs that do not exhibit any reverse blocking voltage substantially are manufactured based on the presumption that the conventional IGBTs will not be biased in reverse. A portion, to which an electric field is liable to localize by a reverse bias voltage applied, is caused in the cut plane near the collector junction plane by dicing and such causes. The mechanical strain caused by dicing and such causes usually remains. In other words, any treatment for securing a certain withstand voltage in the cut plane near the collector junction plane is not conducted. Therefore, a sufficient reverse blocking voltage is not obtained.
Reverse blocking IGBT 270 secures a reverse blocking voltage equivalent to the forward blocking voltage by the depletion layers that expand into n−-type drift layer (substrate) 1 from p-type separation region 91 formed on the chip side wall and p-type collector layer 9 in the reversely biased state, in which the emitter side is biased at a positive potential and the collector side at a negative potential. Since reverse blocking IGBT 270 sustains the forward blocking voltage and the reverse blocking voltage as described above, reverse blocking IGBT 270 is expected to be applicable to the matrix converter and such converters, which are capable of directly converting an AC to another AC, the frequency of which is different from the frequency of the source AC.
In manufacturing reverse blocking IGBT 270, p-type separation region 91 is formed first by diffusing an impurity selectively from the first major surface side of semiconductor substrate 1. Then, the following steps are conducted in the same manner as in forming the ordinary n-channel IGBTs. First, the surface device structure is formed on the first major surface. Then, the back surface side of semiconductor substrate 1 is ground. The ion implantation through the second major surface on the back surface side of semiconductor substrate 1 and the subsequent thermal activation are conducted. Collector electrode 10 is formed by vacuum deposition or by sputtering.
In manufacturing a reverse blocking IGBT of the 1200 V class, diffusion is conducted in an early stage at a high temperature and for a long time from the front surface side in the region which will be dicing line 130. And, p-type separation region 91 of approximately 200 μm in depth is formed. In manufacturing a reverse blocking IGBT of the 600 V class, p-type separation region 91 of approximately 100 μm in depth is formed. At the end of the manufacturing process, p-type separation region 91 is continuous to p-type collector layer 9. After dicing, p-type separation region 91 is exposed to the chip side wall.
In manufacturing conventional reverse blocking IGBT 270, diffusion is conducted at a high temperature for a long time to form p-type separation region 91. Therefore, it is necessary to employ a very thick diffusion mask that causes the manufacturing costs to soar. As the withstand voltage is higher, it is necessary for p-type separation region 91 to be deeper, impairing the throughput through a diffusion furnace badly. Since the diffusion is conducted from the first major surface side of semiconductor substrate 1, the width of p-type separation region 91 is as large as the depth thereof, increasing the occupied area ratio of p-type separation region 91 and widening the chip area.
To obviate the problems described above, Japanese Unexamined Patent Application Publication No. 2004-336008 proposes a manufacturing method that forms a trench first before forming p-type separation region 91 on the first major surface side of semiconductor substrate 1 and then forms p-type separation region 91 using the trench.
However, it is necessary for the technique disclosed in Japanese Unexamined Patent Application Publication No. 2004-336008 to conduct complicated treatments in filling the trench with polysilicon so as not to damage the inside of the trench. It is relatively easy to fill the trench with an insulator. However, the insulator buried in the trench is etched by the etching conducted in forming the surface device structure on the first major surface.
When a trench is bored through the substrate by the technique disclosed in Japanese Unexamined Patent Application Publication No. 2004-336008 to make the dicing unnecessary, many steps are necessary to form the device after the trench is formed and the trench corner on the second major surface side will be broken with a high probability. Based on the technique disclosed in Japanese Unexamined Patent Application Publication No. 2004-336008, the diffusion proceeds from the first major surface side. Therefore, the impurity concentration in the trench corner on the second major surface side is lower. Therefore, if the trench corner on the second major surface side is broken, the reverse blocking voltage will be lowered.
In view of the foregoing, it would be desirable to obviate the problems described above. It would be also desirable to provide a semiconductor device and the manufacturing method thereof that facilitate preventing the reverse blocking voltage from decreasing. It would be further desirable to provide a semiconductor device and the manufacturing method thereof that allows manufacturing time of a semiconductor to be shortened.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.